LEDGERLESS

/INTRODUCING/

Open, InspectableSecure Silicon forDefense Systems

Technical drawing of the holo development board, 50.80 mm by 22.86 mm

/PRESENTING/

Holodi S1 SoC

An open-source RISC-V system-on-chip with secure-element-class features

PACKAGE LID

BOND WIRE LAYER

SILICON DIE

SUBSTRATE

CONTACT PADS

Exploded view of the Holodi S1 package. From the top: package lid, bond wire layer, silicon die, substrate, contact pads.

/AUDITABLE/

A chip that can be independently inspected, verified, and manufactured sovereignly.

Auditable all the way down to the physical silicon: the chip design is open, the firmware is reproducible, and the final fabricated die can be optically inspected.

Floorplan of the Holodi S1 die, 10.00 mm square, showing the core, memory and I/O blocks.
RRAM
4 MiB, Non-volatile on-die
SRAM
2 MiB + 256 KiB I/O with ECC
CPU CORE COMPLEX
RISC-V RV32-IMAC@350 MHz Full MMU with paged virtual memory & Zkn Crypto ext
ALWAYS ON
RTC; power reset; WDT
BIO
I/O coprocessor 4 × PicoRV @ 700 MHz
ANALOG/MS
PLL; USB HS; ADC; reg
CRYPTO
AES, RSA/ECC, SHA-2/3
LOW LEAKAGE
22 nm TSMC Ultra Low Leakage
KEYS + TRNG
Key store, entropy & one-time counters

/HARDWARE ENFORCED SECURITY/

Security Peripherals as building blocks for securing systems

Auditable all the way down to the physical silicon: the chip design is open, the firmware is reproducible, and the final fabricated die can be optically inspected.

Signed & Measured Boot
Only Authenticated firmware & code runs
Remote Attestation
Remotely proves what’s exactly running
On-die Key Store + Hardware TRNG
Random Keys generated & Kept on-chip
Trusted Time + Monotonic counters
Anti-rollback & Freshness
Cryptography: AES. RSA/ECC, SHA-2/3
Encrypt, sign and verify at the hardware level
Quantum Secure: ML-KEM, ML-DSA
Post-quantum Ready
Glitch/fault sensors, ECC memory
Active Tamper Mesh + Sensors for defence
Key Zeroize on Tamper
Instant Key Zeroize on capture attacks
Dimensioned plan drawing of the Ledgerless carrier board, 40.64 by 22.86 mm, with the secure element at centre.

/USE CASES/

Autonomous Defence Systems

A platform the enemy can't take over. Commands signed in hardware, firmware attested before flight, keys that vanish on capture.

Dimensioned plan view of a quadcopter, 268 by 220 mm, with its flight-control board exposed.

AI agents & enterprise automations

Agents are getting authority. Give each one a hardware identity that proves what's running and signs what it does.

Exploded plan view of a compact desktop compute node, 197 mm wide, showing chassis, logic board and I/O tray.

Physical AI & Industrial Robotics

A machine that acts in the physical world must prove it's running trusted code before it moves. Attested boot, signed control, from the arm to the line.

Dimensioned front view of a humanoid robot torso with shoulder actuator, torque module, central core and waist joint called out.

IOT devices

A root of trust in every device. Hardware identity, signed data, and trusted time, so the record can't be quietly rewritten.

Dimensioned plan view of two fixed security cameras, 398 by 210 mm, with lens module, image sensor, PCB module and cable path called out.

M2M Trust & Payments

Machines that transact need identity money can trust. Keys held in silicon sign every authorization and payment at the source.

Dimensioned view of a handheld payment terminal, 65 mm deep, with display module, secure element, battery and hinge/pivot called out.